Cloud native EDA tools & pre-optimized hardware platforms
As different mixed-signal design applications require different configurations of SPICE netlist, RTL and behavioral models, flexibility in languages and topologies supported is crucial for a mixed-signal verification solution. In this video, you will learn about the evolution of Real Number Modeling, a type of behavioral modeling that models analog behavior in the digital domain using discretely simulated REAL values. We will discuss the differences between wreal modeling and SV nettype and some of the advantages that SV nettype brings to SoC design, including superior support for low power.
Arturo Salz, Scientist, Synopsys