About VC Formal Datapath Validation

CPU, GPU and AI designs are datapath heavy with unique design characteristics and require advanced verification techniques and methodology. These designs have mathematical functions like addition, subtraction, multiplier, square root and floating point units (FPU). Specialized AI-enabled processors excel at machine learning tasks and employ large arrays of arithmetic processing units including matrix multiplication and fused multiply-add structures. Verifying these mathematical functions using traditional methods is inefficient, time consuming and impractical.

The VC Formal Property Verification (FPV) App is designed to verify control paths (example arbiters, FIFOs, FSMs, bus bridges, etc.). The VC Formal Datapath Validation (DPV) App with integrated HECTOR™ technology contains custom optimizations and engines for datapath verification (ALU, FPU, DSP etc.).

Key Benefits

Bugs Icon | Synopsys Debug, Planning & Coverage

C/C++ Model as Reference

Check for transactional equivalence against RTL implementation

Scale Icon | Synopsys Debug, Planning & Coverage

Supports Reference Models

SoftFloat and DesignWare reference models

Accelerate Icon | Synopsys Debug, Planning & Coverage

Exhaustive Proofs

The fastest way to find architectural and implementation bugs

Complete Package Icon | Synopsys Debug, Planning & Coverage

Compatibility

Leverages VCS® for unified compile and Verdi® for unified debug

Datapath Validation (DPV)

Integrated HECTOR™ technology within VC Formal and contains custom optimizations and engines for datapath verification (ALU, FPU, DSP etc.) using transaction level equivalence. This app leverages the Verdi graphical user interface for debug.

Resources

Support and Training

SolvNetPlus

Explore the Synopsys Support Community! Login is required.

SNUG

Erase boundaries and connect with the global community.