Synopsys Verification IP (VIP) for Arm® AMBA® AXI™ provides a comprehensive set of protocol, methodology, verification and productivity features. Users are able to achieve rapid verification convergence on their AMBA AXI5, AXI-J/K, AXI4, AXI3, and AXI4-Lite based designs.
AMBA AXI Protocol Features
Complete protocol support for AXI5, AXI-J/K, AXI4, AXI4-Lite, AXI3
Programmable number of Managers, Subordinates, and Port Monitors
Interconnect model
System Monitor
Port & System Level Sequencers
Sequence Library with port & System Level Sequences
Port level protocol checks for all interfaces
System-level checks for protocol and data integrity
Debug port for transaction tracking on waveforms
Built-in Functional Coverage Model
Protocol-aware debugging using Protocol Analyzer
Ability to control delays for valid and ready signals with respect to reference events
Ability to control signal values during idle periods
Contact your Synopsys account manager for more details.