Estimating the Impact of Wafer-to-Wafer (WTW) and Run-to-Run (RTR) Foundry Process Variations on Yield

The layout consists of IMEC foundry process design kit (PDK) elements for the photonic components for the splitter and combiner; and transmission line elements for the RF electrodes. A back-to-back receiver is used to estimate the performance of the transmitter chip. The performance of the TW-MZM depends on the matching between the effective index of the optical waveguide and the electrical transmission line. In addition, the traveling wave nature of the modulator makes it sensitive to reflections due to impedance mismatch in the traveling wave electrode. This application note focuses on the performance impairments due to the impedance mismatches as a result of the wafer-to-wafer (WTW) and run-to-run (RTR) variations in the silicon photonic foundry processes. The impedance mismatch can be between the generator and the phase shifter electrode, or between the phase shifter electrode and the load, or both. The above layout focuses on the mismatch in impedance between the electrode and the load.

After the Monte Carlo statistical scans, Figure 2 shows the effect of the impedance between the electrode and the load on the modulator’s extinction ratio as measured from the optical eye at the modulator output.

Figure 3 shows the effect of the impedance mismatch between the electrode and the load on the bit error rate (BER) of the back-to-back received signal at the modulator.

Modeling the impact of tolerances in the fabrication process not only helps photonic foundries estimate the yield, but also helps system and chip designers understand performance bounds.