ERI Summit & MTO Symposium

Democratizing Secure Silicon

Wednesday, October 20 | 01:15 PM EDT

Hardware attacks are on the rise. In this session Deidre Hanford will address how Synopsys is leading a team of partners to address DARPA’s Automatic Implementation of Secure Silicon program. The vision of this program is to automate development so that secure silicon becomes more broadly available adding further resistance to the multitude of attacks today and in the future. Her video looks at innovations accomplished during phase one and looks forward toward phase two of the program and beyond.

The Next 1000X, Beyond 2D

Thursday, October 21 | 2:15 PM EDT

Seismic shifts in machine intelligence and data requirements are transforming how multi-die systems are architected, designed, and manufactured. While the performance and low-power advances of the last few decades were driven primarily by 2D scaling, tomorrow’s exponential increase in data throughput, risk reduction and power efficiency will be fueled by transformative approaches to 3D integration and disaggregation. In this session, Ming Zhang will describe a few key elements of this transformation:

• Technology trends around systems, manufacturing, and EDA industry.
• Why the right time is now for this transformation.
• Key EDA directional challenges for the next decade, on design, verification, and security.

The session concludes with a vision for the next 1000X opportunities on technology, product, and innovation. 

ZeBu AMS – Novel AMS Validation Solution​

DARPA POSH Program​
Modern day SoCs incorporate analog mixed-signal (AMS) components, such as SERDES, power conditioners, converters, filters, and high-speed DDR memory.  The designs are a challenge for hardware verification.  In DARPA’s POSH program Synopsys has led the development of Analog Mixed-Signal hardware-based emulation. This technology can overcome the limitations of current accelerated simulation technology, such as the lack of support for floating point signals, analog math operations, timing of intermixed analog and digital logic controls, analog outputs, and other AMS design verification not available with today’s digital only emulators. This capability is complemented by automated behavioral modeling of AMS components and by programmable checks that replace manual debug.  These combined techniques achieved 100x verification performance increases over software-based simulation.
Contributors: Oleg Raikhman, Yishai Statter, Dmitry Korchemny, Ilya Kudryavtsev, Alex Rabinovitch,Dale Donchin, Synopsys